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Trenton is a designer and manufacturer of industrial rackmount computer systems, single board computers and backplanes for critical embedded computing applications such as telephony,medical imaging, gaming, military installations,instrumentation, and process control which require performance, precision and reliability.

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PCI Express GEN 2 Questions and Answers

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Trenton will be releasing a new system host board later this week that supports PCI Express Gen 2.0. There are some great questions and answers on the PCISIG website (www.pcisig.com) regarding PCIe 2.0 so I took the opportunity to republish here.

 Q: What are the benefits of PCIe 2.0? What business opportunities does it bring to the market?

A: While doubling the bit rate satisfies high-bandwidth applications, faster signaling has the advantage of allowing various interconnect links to save cost by adopting a narrow configuration. For example, a PCI Express 1.1 x8 link (8 lanes) yields a total aggregate bandwidth of 4GBytes/s, which is the same bandwidth obtained from a PCI Express 2.0 x4 link (4 lanes) that adopts the 5GT/s signaling technology. This can result in significant savings in platform implementation cost while achieving the same performance level. Backward compatibility is retained as existing 2.5 GT/S adapters can plug into 5.0 GT/S slots and will run at the slower rate. Conversely, new PCIe 2.0 adapters running at 5.0 GT/S can plug into existing PCIe slots and run at the slower rate of 2.5 GT/S.

Q: Then PCIe 2.0 must be backward compatible with PCIe 1.1 and 1.0?
A: Yes. The PCIe Base 2.0 specification supports both the 2.5GT/s and 5GT/s signaling technologies. A device designed to the PCIe Base 2.0 specification may support 2.5GT/s, 5GT/s or both. However, a device designed to operate specifically at 5GT/s must also support 2.5GT/s signaling. The PCIe Base specification covers chip-to-chip topologies on the system board. For I/O extensibility across PCIe connectors, the Card Electromechanical (CEM) and ExpressModuleTM specifications will also need to be updated, but this work will not impact mechanical compatibility of the slots, cards or modules. Currently, the PCI-SIG is defining the PCIe CEM 2.0 specification which has been released to members for review at v0.5. There are currently no plans to adapt the PCIe Mini CEM specification for the faster bit rate as the market need has not yet materialized.

Q: What are the initial target applications for PCIe 2.0?
A: The same set of core applications, high-performance graphics, enterprise-class storage and high-speed networking that benefited from the introduction of PCIe 1.0 architecture are expected to lead the charge for adoption of PCIe 2.0.


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